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...	...	@@ -680,18 +680,20 @@
680	680
681	681	With ROC enabled, the payload is as follows:
682	682
683		-(% border="1" cellspacing="3" style="background-color:#f2f2f2; width:510px" %)
	683	+(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:510px" %)
684	684	|(% style="background-color:#4f81bd; color:white; width:97px" %)(((
685	685	**Size(bytes)**
686	686	)))|(% style="background-color:#4f81bd; color:white; width:48px" %)**2**|(% style="background-color:#4f81bd; color:white; width:71px" %)**2**|(% style="background-color:#4f81bd; color:white; width:98px" %)**2**|(% style="background-color:#4f81bd; color:white; width:73px" %)**2**|(% style="background-color:#4f81bd; color:white; width:122px" %)**1**
687	687	|(% style="width:97px" %)Value|(% style="width:48px" %)[[BAT>>||anchor="H2.3.3BatteryInfo"]]|(% style="width:71px" %)[[Probe Model>>||anchor="H2.3.4ProbeModel"]]|(% style="width:98px" %)[[0 ~~~~ 20mA value>>||anchor="H2.3.507E20mAvalue28IDC_IN29"]]|(% style="width:73px" %)[[0 ~~~~ 30v value>>||anchor="H2.3.607E30Vvalue28pinVDC_IN29"]]|(% style="width:122px" %)(((
688		-[[IN1 &IN2 Interrupt  flag>>||anchor="H2.3.7IN126IN226INTpin"]] & ROC_flag
	688	+[[IN1 &IN2 Interrupt  flag>>||anchor="H2.3.7IN126IN226INTpin"]]
	689	+
	690	+& **ROC_flag**
689	689	)))
690	690
691	691	(% style="color:blue" %)**IN1 &IN2 , Interrupt  flag , ROC_flag:**
692	692
693		-(% border="1" cellspacing="3" style="background-color:#f2f2f2; width:515px" %)
694		-|(% style="background-color:#4f81bd; color:white; width:50px" %)**Size(bit)**|(% style="background-color:#4f81bd; color:white; width:60px" %)**bit7**|(% style="background-color:#4f81bd; color:white; width:62px" %)**bit6**|(% style="background-color:#4f81bd; color:white; width:62px" %)**bit5**|(% style="background-color:#4f81bd; color:white; width:65px" %)**bit4**|(% style="background-color:#4f81bd; color:white; width:56px" %)**bit3**|(% style="background-color:#4f81bd; color:white; width:55px" %)**bit2**|(% style="background-color:#4f81bd; color:white; width:55px" %)**bit1**|(% style="background-color:#4f81bd; color:white; width:50px" %)**bit0**
	695	+(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:510px" %)
	696	+|(% style="background-color:#4f81bd; color:white; width:55px" %)**Size(bit)**|(% style="background-color:#4f81bd; color:white; width:65px" %)**bit7**|(% style="background-color:#4f81bd; color:white; width:46.5834px" %)**bit6**|(% style="background-color:#4f81bd; color:white; width:1px" %)**bit5**|(% style="background-color:#4f81bd; color:white; width:65px" %)**bit4**|(% style="background-color:#4f81bd; color:white; width:65px" %)**bit3**|(% style="background-color:#4f81bd; color:white; width:105px" %)**bit2**|(% style="background-color:#4f81bd; color:white; width:105px" %)**bit1**|(% style="background-color:#4f81bd; color:white; width:105px" %)**bit0**
695	695	|(% style="width:75px" %)Value|(% style="width:89px" %)IDC_Roc_flagL|(% style="width:46.5834px" %)IDC_Roc_flagH|(% style="width:1px" %)VDC_Roc_flagL|(% style="width:89px" %)VDC_Roc_flagH|(% style="width:89px" %)IN1_pin_level|(% style="width:103px" %)IN2_pin_level|(% style="width:103px" %)Exti_pin_level|(% style="width:103px" %)Exti_status
696	696
697	697	* (% style="color:#037691" %)**IDC_Roc_flagL**