<
From version < 126.9 >
edited by Xiaoling
on 2023/06/19 15:54
To version < 126.10 >
edited by Xiaoling
on 2023/06/19 15:55
>
Change comment: There is no comment for this version

Summary

Details

Page properties
Content
... ... @@ -742,7 +742,7 @@
742 742  
743 743  (% style="color:#4f81bd" %)**TRI FLAG1**(%%) is a combination to show if trigger is set for this part. Totally 1byte as below
744 744  
745 -(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:520px" %)
745 +(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:515px" %)
746 746  |**bit7**|**bit6**|**bit5**|**bit4**|**bit3**|**bit2**|**bit1**|**bit0**
747 747  |(((
748 748  AV1_LOW
... ... @@ -771,7 +771,7 @@
771 771  
772 772  (% style="color:#4f81bd" %)**TRI Status1**(%%) is a combination to show which condition is trigger. Totally 1byte as below
773 773  
774 -(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:520px" %)
774 +(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:515px" %)
775 775  |**bit7**|**bit6**|**bit5**|**bit4**|**bit3**|**bit2**|**bit1**|**bit0**
776 776  |(((
777 777  AV1_LOW
... ... @@ -800,7 +800,7 @@
800 800  
801 801  (% style="color:#4f81bd" %)**TRI_DI FLAG+STA **(%%)is a combination to show which condition is trigger. Totally 1byte as below
802 802  
803 -(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:520px" %)
803 +(% border="1" cellspacing="4" style="background-color:#f2f2f2; width:515px" %)
804 804  |**bit7**|**bit6**|**bit5**|**bit4**|**bit3**|**bit2**|**bit1**|**bit0**
805 805  |N/A|N/A|N/A|N/A|DI2_STATUS|DI2_FLAG|DI1_STATUS|DI1_FLAG
806 806  
Copyright ©2010-2024 Dragino Technology Co., LTD. All rights reserved
Dragino Wiki v2.0