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Last modified by Mengting Qiu on 2025/06/04 18:42
From version 111.2
edited by Xiaoling
on 2023/01/29 11:26
Change comment: There is no comment for this version
To version 110.2
edited by Xiaoling
on 2022/12/23 08:41
Change comment: There is no comment for this version

Summary

Details

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Content
... ... @@ -654,6 +654,7 @@
654 654  AT+ DTRI =1,0   (Enable DI1 trigger / disable DI2 trigger)
655 655  
656 656  
657 +
657 657  (% style="color:#037691" %)**Downlink Command to set Trigger Condition:**
658 658  
659 659  Type Code: 0xAA. Downlink command same as AT Command **AT+AVLIM, AT+ACLIM**
... ... @@ -714,6 +714,7 @@
714 714  10000000: Means this packet is trigger by AC1_LOW. Means voltage too low.
715 715  
716 716  
718 +
717 717  (% style="color:#4f81bd" %)**TRI_DI FLAG+STA **(%%)is a combination to show which condition is trigger. Totally 1byte as below
718 718  
719 719  [[image:image-20220524090456-4.png]]
... ... @@ -727,6 +727,7 @@
727 727  00000101: Means both DI1 and DI2 trigger are enabled.
728 728  
729 729  
732 +
730 730  (% style="color:#4f81bd" %)**Enable/Disable MOD6 **(%%): 0x01: MOD6 is enable. 0x00: MOD6 is disable.
731 731  
732 732  Downlink command to poll MOD6 status:
... ... @@ -1063,9 +1063,8 @@
1063 1063  
1064 1064   Latching time. Unit: ms
1065 1065  
1069 +Note:
1066 1066  
1067 -(% style="color:red" %)**Note: **
1068 -
1069 1069   Since Firmware v1.6.0, the latch time support 4 bytes and 2 bytes
1070 1070  
1071 1071   Before Firmwre v1.6.0 the latch time only suport 2 bytes.
... ... @@ -1094,7 +1094,7 @@
1094 1094  
1095 1095  
1096 1096  
1097 -==== 3.4.2. 14 Relay ~-~- Control Relay Output RO1/RO2 ====
1099 +==== 3.4.2.14 Relay ~-~- Control Relay Output RO1/RO2 ====
1098 1098  
1099 1099  
1100 1100  * (% style="color:#037691" %)**AT Command:**
... ... @@ -1154,9 +1154,8 @@
1154 1154  
1155 1155  (% style="color:#4f81bd" %)**Fourth/Fifth/Sixth/Seventh Bytes(cc)**(%%): Latching time. Unit: ms
1156 1156  
1159 +Note:
1157 1157  
1158 -(% style="color:red" %)**Note:**
1159 -
1160 1160   Since Firmware v1.6.0, the latch time support 4 bytes and 2 bytes
1161 1161  
1162 1162   Before Firmwre v1.6.0 the latch time only suport 2 bytes.
... ... @@ -1167,7 +1167,7 @@
1167 1167  
1168 1168  **Example payload:**
1169 1169  
1170 -**~1. 05 01 11 07 D0**
1171 +**~1. 05 01 11 07 D**
1171 1171  
1172 1172  Relay1 and Relay 2 will be set to NC , last 2 seconds, then change back to original state.
1173 1173  
... ... @@ -2210,4 +2210,5 @@
2210 2210  * [[Datasheet, Document Base>>https://www.dropbox.com/sh/gxxmgks42tqfr3a/AACEdsj_mqzeoTOXARRlwYZ2a?dl=0]]
2211 2211  * [[Hardware Source>>url:https://github.com/dragino/Lora/tree/master/LT/LT-33222-L/v1.0]]
2212 2212  
2214 +
2213 2213