Last modified by Edwin Chen on 2022/11/22 09:38
<
From version < 18.1 >
edited by Edwin Chen
on 2022/06/02 15:24
To version < 19.1 >
edited by Bei Jinggeng
on 2022/11/14 14:01
>
Change comment: There is no comment for this version

Summary

Details

Page properties
Author
... ... @@ -1,1 +1,1 @@
1 -XWiki.Edwin
1 +XWiki.Bei
Content
... ... @@ -376,9 +376,116 @@
376 376  
377 377  (((
378 378  **AT+GROUPMOD=1,2**  Set the RX group numbered 2
379 +
380 +
381 +=== 2.3.1 TRIG command is configured in the transmit LT. (LT1)(Since firmware 1.3) ===
379 379  )))
380 380  
384 +**AT+TRIGx=a     **Trigger transmit directly without triggering time
381 381  
386 +**AT+TRIGx=a,b**  Trigger transmit with triggering time threshold
387 +
388 +**AT+TRIGx=a,b,c **Trigger transmit with triggering time threshold, and continue to transmit every xx seconds if DI status no change.
389 +
390 +
391 +a=0: falling edge;
392 +
393 +a=1: rising edge;
394 +
395 +a=2: falling edge or rising edge;
396 +
397 +b:  triggering time in milliseconds.
398 +
399 +c: transmit interval
400 +
401 +
402 +**Use Case 1**: Once the DI1 port status change ( either from low to high or high to low, LT1 sends a trigger to LT-2)
403 +
404 +Command:
405 +
406 +AT+TRIG1=2,50  Falling edge or rising edge trigger, and the trigger time should exceed 50ms.
407 +
408 +
409 +**Use Case 2: **Sync LT2 RO / DO status with LT1 every minute.
410 +
411 +Command:
412 +
413 +AT+TRIG2=2,50,60 Once there is falling edge or rising edge on DI2 of LT1, LT1 will transmit trigger to LT2 and LT2 can sync the status of RO/DO.
414 +
415 +
416 +=== 2.3.2 RO/DO is configured in the receiver LT (LT2)(Since firmware 1.3) ===
417 +
418 +AT+DI1TODO1= maps value[,latch time]
419 +
420 +AT+DI1TORO1= maps value[,latch time]
421 +
422 +AT+DI2TODO2= maps value[,latch time]
423 +
424 +AT+DI2TORO2= maps value[,latch time]
425 +
426 +
427 +(% border="1" style="background-color:#f7faff; color:black; width:706px" %)
428 +| **Maps value**|DIx to DOx|DIx to ROx
429 +|0|No Action|No Action
430 +|1|If DIx is high, control DOx to output low level, If DIx is low, control DOx to output high level|(((
431 +If DIx is high, control ROx to close,
432 +
433 +if DIx is low, control ROx to open
434 +)))
435 +|2|If DIx is high, control DOx to output high level, If DIx is low, control DOx to output low level|(((
436 +If DIx is high, control ROx to open,
437 +
438 +if DIx is low, control ROx to close
439 +)))
440 +|3|DOx state flip|ROx state flip
441 +
442 +latch time, if latch time is defined, DO or RO will go back to the original status after latch time, if there is a new trigger comes, the LT2 will use the new latch time settings and ignore the old one.
443 +
444 +
445 +**Case1**:
446 +
447 +AT+DI1TODO1=1 ~/~/ LT2 DO1 will follow LT1 DI1 trigger command, if DI1 of LT1 is trigger high, DO1 of LT2 will output low, if DI1 of LT1 is trigger low, DO2 of LT2 will output high.
448 +
449 +
450 +**Case2**:
451 +
452 +AT+DI1TODO1=1,60 ~/~/ LT2 DO1 will follow LT1 DI1 trigger command, DO1 will keep the status 60 seconds and then go back to original state.
453 +
454 +
455 +=== 2.3.3 Save the RO/DO status during power off(Since firmware 1.3) ===
456 +
457 +Enable/Disbale retain Digital Output/Relay Output after power off / Power On
458 +
459 +AT+DOROSAVE=0 ~/~/ Disable Retain after power off/on
460 +
461 +AT+DOROSAVE=1 ~/~/ Enable Retain after power off/on
462 +
463 +AT+DOROSAVE=2,a,b,c,d ~/~/ set DO/RO port to default state after power on.
464 +
465 +a: for DO1
466 +
467 +b: for DO2
468 +
469 +c: for RO1
470 +
471 +d: for RO2.
472 +
473 +Example:
474 +
475 +AT+DOROSAVE=2,0,0,0,1 ~/~/ Set DO1/DO2 to Low, RO1 to open after power on , set RO2 to close after power on.
476 +
477 +
478 +=== 2.3.4 Control Sleep status.(Since firmware 1.3) ===
479 +
480 +DI2 can be used to set LT into sleep mode.
481 +
482 +AT+DI2SLEEP=1 ~/~/Enable DI2 as Sleep pin
483 +
484 +AT+DI2SLEEP=0 ~/~/Disable DI2 as Sleep pin
485 +
486 +When DI2 is enabled as sleep pin, a falling trigger (with 500ms pulse) will set LT into sleep mode. A raising trigger will wake up it again.
487 +
488 +
382 382  == **2.4 Data Format** ==
383 383  
384 384  (((
... ... @@ -489,4 +489,106 @@
489 489  (% style="color:#037691" %)**The 9th byte**(%%)**:**  DI2TORO2 when an interrupt is triggered, 0 when an interrupt is not triggered.
490 490  )))
491 491  
599 +(((
492 492  
601 +
602 +(% style="color:#4f81bd" %)**Payload:（Since firmware 1.3）The receiver replies to the sent packet**
603 +)))
604 +
605 +(% border="1" style="background-color:#f7faff; color:black; width:938px" %)
606 +|=(% style="width: 123px;" %)(((
607 +**Size (bytes)**
608 +)))|=(% style="width: 107px;" %)(((
609 +1
610 +)))|=(% style="width: 107px;" %)(((
611 +1
612 +)))|=(% style="width: 107px;" %)(((
613 +1
614 +)))|=(% style="width: 107px;" %)(((
615 +1
616 +)))|=(% style="width: 107px;" %)(((
617 +1
618 +)))|=(% style="width: 107px;" %)(((
619 +1
620 +)))|=(% style="width: 107px;" %)(((
621 +1
622 +)))|=(% style="width: 107px;" %)(((
623 +1
624 +)))|=(% style="width: 107px;" %)(((
625 +1
626 +)))
627 +|(% style="width:123px" %)(((
628 +**Value**
629 +)))|(% style="width:38px" %)(((
630 +address
631 +)))|(% style="width:70px" %)(((
632 +request
633 +)))|(% style="width:52px" %)(((
634 +ACK
635 +)))|(% style="width:127px" %)(((
636 +(((
637 +DO1&
638 +)))
639 +
640 +(((
641 +DO1 level
642 +)))
643 +)))|(% style="width:101px" %)(((
644 +DI1TODO1
645 +)))|(% style="width:91px" %)(((
646 +DI1TORO1
647 +)))|(% style="width:111px" %)(((
648 +(((
649 +RO2&
650 +)))
651 +
652 +(((
653 +RO2 level
654 +)))
655 +)))|(% style="width:105px" %)(((
656 +DI2TODO2
657 +)))|(% style="width:106px" %)(((
658 +DI2TORO2
659 +)))
660 +
661 +(((
662 +(% style="color:#037691" %)**The first byte**(%%)**:**  00 is the broadcast address, 01-08 is the RX group number.
663 +)))
664 +
665 +(((
666 +(% style="color:#037691" %)**The second byte**(%%)**:**  send mapping request when not 0, not request when it is 0.
667 +)))
668 +
669 +(((
670 +(% style="color:#037691" %)**The third byte**(%%)**:**  ACK returned to the sender after the mapping is completed.
671 +)))
672 +
673 +(((
674 +(((
675 +(% style="color:#037691" %)**The fourth byte**(%%)**:**  the high four bits are 1 to represent DO1, and the low four bits are the level of DO1 when the interrupt is triggered.
676 +)))
677 +)))
678 +
679 +(((
680 +(% style="color:#037691" %)**The Fifth byte**(%%)**:       **DI1TODO1 when the interrupt is triggered, 0 when the interrupt is not triggered.
681 +)))
682 +
683 +(((
684 +(% style="color:#037691" %)**The Sixth byte**(%%)**:**  0 does not trigger interrupt when DI1TORO1 interrupt is triggered.
685 +)))
686 +
687 +(((
688 +(((
689 +(% style="color:#037691" %)**The seventh byte**(%%)**:**  the high four bits are 2 to represent RO2, and the low four bits are the level of RO2 when the interrupt is triggered.
690 +)))
691 +)))
692 +
693 +(((
694 +(% style="color:#037691" %)**The 8th byte**(%%)**:          **DI2TODO2 when the interrupt is triggered, 0 when the interrupt is not triggered.
695 +)))
696 +
697 +(((
698 +(% style="color:#037691" %)**The 9th byte**(%%)**:**  DI2TORO2 when an interrupt is triggered, 0 when an interrupt is not triggered.
699 +)))
700 +
701 +

Applications

Navigation

Copyright ©2010-2022 Dragino Technology Co., LTD. All rights reserved
Dragino Wiki v2.0