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Last modified by Saxer Lin on 2025/03/18 17:25
From version 75.10
edited by Xiaoling
on 2023/11/02 15:48
Change comment: There is no comment for this version
To version 75.13
edited by Xiaoling
on 2023/11/02 15:52
Change comment: There is no comment for this version

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516 516  [[image:image-20230513111203-7.png||height="324" width="975"]]
517 517  
518 518  
519 -==== 2.3.2.8  MOD~=8 （3ADC+1DS18B20） ====
519 +==== 2.3.2.8  MOD~=8 (3ADC+1DS18B20) ====
520 520  
521 521  
522 522  (% border="1" cellspacing="4" style="background-color:#f2f2f2; width:520px" %)
... ... @@ -582,7 +582,7 @@
582 582  When AA is 2, set the count of PA4 pin to BB Corresponding downlink：09 02 bb bb bb bb
583 583  
584 584  
585 -==== 2.3.2.10  MOD~=10 (PWM input capture and output mode，Since firmware v1.2) ====
585 +==== 2.3.2.10  MOD~=10 (PWM input capture and output mode, Since firmware v1.2) ====
586 586  
587 587  
588 588  In this mode, the uplink can perform PWM input capture, and the downlink can perform PWM output.