Summary

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Author

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1		-XWiki.Edwin
	1	+XWiki.Xiaoling

Content

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14	14	)))
15	15
16	16	(((
17		- [[LT22222-L_PingPong_Software>>https://github.com/dragino/LT-22222-L]]
18		-
19		-
	17	+[[Point to Point Software for LT-22222-L>>https://github.com/dragino/LT-22222-L]].
20	20	)))
21	21
	20	+
22	22	= 2. Features for this firmware =
23	23
24	24	== 2.1  Point To Point ==
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44	44	|(% style="width:179px" %)AT+DI2TODO2=2 |(% style="width:177px" %)AT+DI2TODO2=2
45	45	|(% style="width:179px" %)AT+DI2TORO2=2|(% style="width:177px" %)AT+DI2TORO2=2
46	46
	46	+
	47	+
47	47	=== 2.2.3 Serial port display ===
48	48
49	49
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403	403
404	404	**Command:**
405	405
406		-**AT+TRIG2=2,50,60**  Once there is falling edge or rising edge on DI2 of LT1, LT1 will transmit trigger to LT2 and LT2 can sync the status of RO/DO. After power off, power on, LT1 will send trigger without falling/rising edge, so the DI changes during power off will be sync as well.
	407	+**AT+TRIG2=2,50,60**  Once there is falling edge or rising edge on DI2 of LT1, LT1 will transmit trigger to LT2 and LT2 can sync the status of RO/DO.
407	407
408	408
409	409	=== 2.3.2 RO/DO is configured in the receiver LT (LT2)(Since firmware 1.3) ===
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482	482
483	483	When DI2 is enabled as sleep pin, a falling trigger (with 500ms pulse) will set LT into sleep mode. A raising trigger will wake up it again.
484	484
485		-In sleep mode, DORO will keep its initial state if AT+DOROSAVE=2, otherwise DORO will be in OFF state
486	486
487		-
488	488	== 2.4 Data Format ==
489	489
490	490
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493	493	)))
494	494
495	495	(((
496		-(% style="color:blue" %)**Payload:Payload triggered by TDC or DI**
	495	+(% style="color:blue" %)**Payload:**
497	497	)))
498	498
499	499	(% border="1" style="background-color:#f7faff; color:black; width:825px" %)
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624	624	ACK
625	625	)))|(% style="width:85px" %)(((
626	626	(((
627		-DOI1&
628		-DOI2 level
	626	+DO1&
	627	+DO1 level
629	629	)))
630	630	)))|(% style="width:90px" %)(((
631	631	DI1TODO1
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656	656
657	657	(((
658	658	(((
659		-(% style="color:#037691" %)**The fourth byte**(%%)**:**  the high four bits are 1 to represent DOI1, and the low four bits are the level of DOI2 when the interrupt is triggered.
	658	+(% style="color:#037691" %)**The fourth byte**(%%)**:**  the high four bits are 1 to represent DO1, and the low four bits are the level of DO1 when the interrupt is triggered.
660	660	)))
661	661	)))
662	662