<
From version < 19.4 >
edited by Xiaoling
on 2022/11/15 09:14
To version < 22.1 >
edited by Bei Jinggeng
on 2022/11/15 10:41
>
Change comment: There is no comment for this version

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Author
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1 -XWiki.Xiaoling
1 +XWiki.Bei
Content
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43 43  |(% style="width:179px" %)AT+DI2TODO2=2 |(% style="width:177px" %)AT+DI2TODO2=2
44 44  |(% style="width:179px" %)AT+DI2TORO2=2|(% style="width:177px" %)AT+DI2TORO2=2
45 45  
46 -
47 -
48 48  === 2.2.3 Serial port display ===
49 49  
50 50  
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483 483  
484 484  When DI2 is enabled as sleep pin, a falling trigger (with 500ms pulse) will set LT into sleep mode. A raising trigger will wake up it again.
485 485  
484 +In sleep mode, DORO will keep its initial state if AT+DOROSAVE=2, otherwise DORO will be in OFF state
486 486  
486 +
487 487  == 2.4 Data Format ==
488 488  
489 489  
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492 492  )))
493 493  
494 494  (((
495 -(% style="color:blue" %)**Payload:**
495 +(% style="color:blue" %)**Payload:Payload triggered by TDC or DI**
496 496  )))
497 497  
498 498  (% border="1" style="background-color:#f7faff; color:black; width:825px" %)
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623 623  ACK
624 624  )))|(% style="width:85px" %)(((
625 625  (((
626 -DO1&
627 -DO1 level
626 +DOI1&
627 +DOI2 level
628 628  )))
629 629  )))|(% style="width:90px" %)(((
630 630  DI1TODO1
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655 655  
656 656  (((
657 657  (((
658 -(% style="color:#037691" %)**The fourth byte**(%%)**:**  the high four bits are 1 to represent DO1, and the low four bits are the level of DO1 when the interrupt is triggered.
658 +(% style="color:#037691" %)**The fourth byte**(%%)**:**  the high four bits are 1 to represent DOI1, and the low four bits are the level of DOI2 when the interrupt is triggered.
659 659  )))
660 660  )))
661 661  
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